Communications

Nano-devices will emerge only if the technological variability inherent to their scale can be handled. With their intrinsic tolerance to defects and auto-compensation capabilities, neuromorphic architectures allow lifting this roadblock. Nano-memristors, which are non-volatile programmable resistors, are ideally suited to be used as synapses in such architectures. We aim at studying a new class of scaled-down organic memory devices, building arrays of such devices, interfacing these memory blocks with CMOS electronics, proposing the associated learning algorithms and implementing such architectures.