Communications

The presentation of the communications of the CHIST-ERA Conference 2012 (keynote and short talks, posters) will be continuously updated in the course of June.

Babak Falsafi
Computing with Dark Silicon
Babak Falsafi

Babak Falsafi is a Professor in the School of Computer and Communication Sciences at EPFL (http://ic.epfl.ch/page-5735-en.html), and an Adjunct Professor of Electrical & Computer Engineering and Computer Science at Carnegie Mellon. He is the founding director of the EcoCloud research center at EPFL (http://www.ecocloud.ch/) innovating future energy-efficient and environmentally friendly cloud technologies. His research targets design for dark silicon, architectural support for parallel programming, resilient systems, architectures to break the memory wall, and analytic and simulation tools for computer system performance evaluation.

Abstract

Information technology is now an indispensable pillar of a modern-day society, thanks to the proliferation of digital platforms in the past several decades. While demand for computing is increasing at unprecedented levels, the digital platforms (i.e., servers and datacenters) that form the backbone of IT have hit an energy “wall”. In the past decades, as chip densities increased, individual transistors also become more energy-efficient, enabling designers to exploit the increase in transistors to enhance chip functionality and perceived performance. While chip densities are projected to continue to scale well into the next decade, transistor energy efficiency has slowed down, resulting in a paradigm shift in computing to “dark silicon” where only a fraction of a chip’s transistors can be powered up at any given time. In this talk, I will present evidence to motivate this paradigm shift, and describe its implications on computing.

Green ICT, towards Zero Power ICT
09:30, September 5

Keynote talk

AttachmentSize
Presentation Babak Falsafi.pdf22.41 MB
Clivia M. Sotomayor Torres
Phonon Engineering and Confined Acoustic Phonons in Si Membranes
Clivia M. Sotomayor Torres

Prof. Clivia M. Sotomayor Torres is full-time ICREA Research Professor at the Catalan Institute of Nanotechnology (ICN - http://www.nanocat.org/) where she set up the Phononic and Photonic Nanostructures group. Prior to joining ICN, she was research professor at the University College Cork, Tyndall National Institute, Ireland. Her research interests are in the field of science and engineering of optical nanostructures, especially novel lithography methods for their realisation, such as nanoimprint lithography. More recently she has been working on inorganic nanotubes and confined phonons in silicon-on-insulator thin films.

Abstract

To get as close as possible to zero power electronics, the understanding of phonons and fluctuations in IT device-relevant materials is essential. Lattice vibrations or phonons are at the heart of heat generation, transport and storage starting at the atomic scale. In nanoscience we have learnt that the characteristics of excitations in solids are strongly modified as dimensions are reduced and become commensurate with their de Broglie wavelength. The dispersion relations determining their interactions are strongly modified and this impacts the way that, for example, phonons interact with electrons, spins, photons and plasmons. Therein exists a major opportunity to understand and modify the heat transport by phonons in nanoelectronics. The theoretical descriptions are in general classical, however, once quantised electrons come into play, quantum mechanics needs to be considered.

Viewing fluctuations as low frequency phonons helps us in our understanding of noise and energy harvesting. The descriptions in these cases are firmly based in statistical mechanics highlighting the need for a stronger interaction with that area of research. Quantum processes in photosynthesis, noise generation and transmission of information below KT are some of the examples demonstrating the need to bring together currently separate bodies of knowledge.

Our research is focused on confined acoustic phonons, which have been invoked in the explanation of thermal conductance in condensed matter in attempts to explain experimental results in, eg., Si and metals both bulk and microstructures. The predictions of Hicks and Dresselhaus of the dominant role of dimensionality in the thermoelectric figure of merit ZT spun renewed interest in the study of confined acoustic phonons. The theoretical background on the origin of these modes triggered inelastic light scattering studies. Perhaps the most unambiguous observations of confined acoustic phonons in Si nanostructures were those in sub 40 nm thick SOI membranes which showed acoustic phonons in low frequency Raman scattering, the frequencies of which increased with decreasing membrane thickness.

We will discuss progress in our understanding of confined phonons since, its impact on thermal transport and outstanding scientific questions.

Green ICT, towards Zero Power ICT
11:30, September 5

Keynote talk

Giorgos Fagas
Nanotechnology Designed For Energy-sustainable Electronics
Giorgos Fagas

Giorgos Fagas is a Researcher at Tyndall National Institute in Ireland. He is the coordinator of the project SiNAPS (http://www.sinaps-fet.eu) in the initiative on Towards Zero Power ICT of the EU's FET programme and is participating in the FET coordination action so-called ZEROPOWER (http://www.zero-power.eu/). His expertise is in transport and quantum effects in nanomaterials and low dimensional structures and has been developing simulation tools that constitute part of Tyndall’s IP portfolio on software.

Abstract

In a world of increasing global energy demand, ICT and consumer electronics account for one of the fastest growing sectors of energy consumption. It is projected that by 2030 the global energy use by just residential electronic gadgets could rise to 1,700TWh, greater than the current electricity generation capacity of the third largest producer in the world. On the other hand, miniaturised electronic systems applied in ambient intelligence, point-of-care diagnostics, supply-chain control and chemical warfare can potentially achieve large cost/energy savings with additional huge societal impact. The major challenges also come in dual form, namely: (i) energy needs to be harvested from sustainable ambient sources and (ii) the use of energy needs to be optimised.

Recent advances in ICT have been enabled by materials design and fabrication at the nanoscale. In this talk, I will provide examples of how nanotechnology and design at the smallest scales can enhance the efficiency of energy harvesters and the properties of electronic devices for energy-sustainability, beyond traditional approaches. I will also highlight the symbiotic relationship with computational modelling and simulations and the need for co-design.

Green ICT, towards Zero Power ICT
09:00, September 5

Keynote talk

AttachmentSize
Presentation Giorgos Fagas.pdf21.69 MB
Marc Duranton
New computing architectures for Green ICT
Marc Duranton

Dr. Marc Duranton is a senior member of the Embedded Computing Lab, part of the CEA LIST (http://www-list.cea.fr/gb/presentation/list_overview.htm). He previously spent more than 23 years in Philips, Philips Semiconductors and NXP Semiconductors. His research interests include parallel and highly efficient architectures, domain specific architecture, system modeling and validation, models of computation for real-time systems, emerging paradigms for computing systems. He is in charge of the roadmap activity in the Network of Excellence HiPEAC2 (http://www.hipeac.net/).

Abstract

ICT and embedded electronic systems have had a tremendous impact on everyday life over the past decades in all domains. Their performance was fuelled by the “Moore’s law” that has driven the semiconductor industry, pushing towards fast processors, huge memory sizes and increasing communication bandwidth. But a major paradigm shift is taking place now. “Moore’s law”, while keeping its pace on transistor density, will only allow a minor increase of frequency and decrease of power dissipation per transistor. Even if it will still be feasible to pack more devices on a chip, the power dissipation of each device will not be reduced accordingly, and, as we are already at a limit of power dissipation or consumption, it will not be possible anymore to use all devices on a chip simultaneously. New technology nodes also add more leakage power, more dispersion and less reliability.

Higher energy efficiency and delivering reliable behavior from unreliable and highly disperse components lead to investigate new research directions at all level. This talk will focus mainly on solutions at the architecture level and their implications: highly parallel and specialized hardware, optical interconnect and 3-D stacking, permanent storage memories - allowing to change the memory hierarchy -, new computing paradigms, like bio-inspired systems, new ways of coding or processing information - changing the displacement of data and instructions -, reversible computing – reducing energy dissipation -.

We are entering a challenging period to explore a large spectrum of techniques that seem promising in achieving particular tasks at high efficiency level while decreasing the impact of the constraints of the new technology nodes.

Green ICT, towards Zero Power ICT
11:00, September 5

Keynote talk

AttachmentSize
Presentation Marc Duranton.pdf5.16 MB
Mihai Adrian Ionescu
Zero Power Challenges In Guardian Angels For A Smarter Life
Mihai Adrian Ionescu

Mihai Adrian Ionescu is an Associate Professor at the Swiss Federal Institute of Technology, Lausanne, Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France, LPCS-ENSERG, Grenoble, France and Stanford University, USA, in 1998 and 1999. Dr. Ionescu has published more than 250 articles in international journals and conferences. He is director of the Laboratory of Micro/Nanoelectronic Devices (NANOLAB - http://nanolab.epfl.ch/) and head of the Doctoral School in Microsystems and Microelectronics of EPFL. He is appointed as national representative of Switzerland for the European Nanoelectronics Initiative Advisory Council (ENIAC) and member of the Scientific Committee of CATRENE. Dr. Ionescu is the European Chapter Chair of the ITRS Emerging Research Devices Working Group and he is the chair of the EU's FET flagship pilot Guardian Angels (http://www.ga-project.eu/). The research activities of Dr. Adrian Ionescu fall in the areas of beyond CMOS technology and devices, more-than-Moore devices and circuits, and non-silicon devices and circuits.

Abstract

The goal of the FET Flagship Guardian Angels (GA) for a Smarter Life is to develop enabling technologies for personal assistants envisioned as energy efficient, intelligent, autonomous systems-of-systems featuring sensing, computation, and communication with characteristics well beyond human capabilities. It is intended that these personalized Guardian Angels will provide assistance from infancy right through to old age. The GA will enlarge the cognitive abilities of individuals and will provide access to a useful augmented reality while preserving full control by the individuals of their Guardian Angels and a high degree of security of the information. Some of the main features of Guardian Angels will be centered on concepts of prevention (in fields like quality of life, bio-medical, security, etc.) and smart advice based on sensor fusion and interdevice communication. In this presentation we concentrate on the scientific and technological challenges related to the development of a full ultra low energy innovation chain: from materials and devices, to the heterogeneous system integration, and software and communication techniques enabling energy consumption by up to three orders of magnitude compared to existing state-of-the-art technologies.

Green ICT, towards Zero Power ICT
15:30, September 5

Keynote talk

Rudolf Sollacher
Green & Smart - Large Scale Wireless Sensor & Actuator Networks
Rudolf Sollacher

Dr. Rudolf Sollacher has studied Theoretical Physics at Techn. Univ. Munich where he has received his PhD in 1990. After research positions at Niels-Bohr-Institute, Copenhagen, Denmark and Gesellschaft f. Schwerionenforschung, Darmstadt, Germany, he came to Siemens Corporate Technology (http://www.siemens.com/innovation/en/about_fande/corp_technology/index.htm). Here, Dr. Sollacher has been managing cross divisional R&D projects in the areas vehicle traffic management, wireless sensor & actuator networks and recently the Smart Grid application Demand Response.

Abstract

Monitoring and controlling processes in industry, logistics and urban environments will be done more and more by wireless sensor and actuator networks. Among their main benefits is cost efficiency by avoiding wiring, plug & play behavior and provision of services like localization. These benefits require a long enough battery lifetime and a certain embedded "intelligence". With the current state of the art battery lifetimes of more than 10 years are already feasible; however, these solutions require quite some engineering effort and often are not flexible concerning changing requirements during their lifetime. Progress in this respect requires innovative concepts for energy harvesting, storage and management; examples are combinations of different harvesting techniques or bio-inspired techniques. A promising mean for reducing the energy consumption are wake-up radios; while proven concepts exists their integration into the medium access, networking and application protocols requires further research. MIMO techniques can save energy, can support localization and can improve the reliability of the wireless channel in such networks. Appropriate hardware and protocols have still to be developed. In-network processing in large scale deployments is a must; making it flexible and adaptive to changing requirements is still an open research challenge.

Green ICT, towards Zero Power ICT
10:00, September 5

Keynote talk

AttachmentSize
Presentation Rudolf Sollacher.pdf1.96 MB
Share/Save